In our last discussion, we talked about DFT, which plays a significant role in reducing costs in prototyping. There are a wide variety of reasons that prototyping is a significant expense in the development and production processes. A large part of the cost is the increasing complexity of designs, inclusion of more processors and FPGA’s, greatly reduced board real estate, and diminishing test access. With the cost of FPGA’s and processors rising as they too become more powerful, getting small batches of devices is expensive. If one of those devices is fried during prototype testing, the cost to prototype a new design escalates rapidly, especially if the cause of the failure isn’t quickly determined.
While we can hypothesize on other ways to reduce costs, the one way we know we can help reduce costs in prototyping and manufacturing is through the use of boundary scan testing and JTAG test programming. Boundary scan testing/JTAG testing is an ideal solution for this environment. This is due to a number of reasons.
Here are the top reasons: Safe, Re-usable (on any project), Repeatable, Flexible, Cost Effective.
Over the years, we’ve seen all kinds of things happen in the design and development process. Without fail, the design will be prototyped, and some unlucky person will turn on the power only to have that smell that’s worse than burned popcorn take over the lab…that’s right – a fried FPGA that cost $X,000.00. Ouch!
Using boundary scan/JTAG to test the boards is one very cost effective way to save a headache and heartache in the prototyping phase of the project. Because prototyping is the phase of the project that includes the discovery process of what actually works and doesn’t work as the project leaves the design phase, and because it is is exposed to the most rigorous testing, which will all become the basis for production, it only makes sense to establish good practices at this point.
JTAG Boundary Scan tests are safe because they can be restricted to test only safe circuits, laying the foundation for gradually developing more complex tests that include more of the board. By testing safe circuits, it is much, much, easier to diagnose and repair faults as the tests develop in complexity. The tests are flexible because they can be re-used, they can be augmented – either add more complexity, or strip out complexity – they can reach parts of the board, (BGA’s, memory, etc), that other tests can’t, and they can pin-point failures. This alleviates the pain of blindly trying to find faults on the board, and will save considerable amounts of time and frustration diagnosing the board. In addition, one set of boundary scan/JTAG tests can be shared and used across the organization, and throughout the entire prototyping process, then deployed into the manufacturing process.
Ultimately, boundary scan testing utilizing JTAG tools will provide immediate savings, not just in helping prevent fried components, but because the tools can be re-used on any other prototype project, and will support the manufacturing process and field applications.
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